A trans-inductor voltage regulator (TLVR) modifies the standard multiphase buck converter, accelerating the converter’s output present slew-rate velocity capabilities to method the quick load slew charge of the high-speed processor or application-specific built-in circuit’s core voltage rail. The output inductors every get a secondary winding, that are related in sequence to create a secondary loop to speed up the response to load adjustments. This enchancment in load transient efficiency is at the price of elevated steady-state ripple and its ensuing energy loss, nevertheless. The issue is that it is vitally laborious to estimate the precise total inductance within the secondary loop, which is a major driver of efficiency, as format and printed circuit board (PCB) building can considerably have an effect on it. On this energy tip, I’ll present a easy measurement that you should use to estimate precise leakage inductance within the TLVR secondary loop and optimize efficiency.
Determine 1 is a simplified schematic of the multiphase buck converter with out and with the TLVR circuit.
Determine 1 Simplified multiphase buck converter and TLVR schematics. Supply: Texas Devices
Observe the added secondary loop within the TLVR connecting all the secondaries of the output inductors with the compensating inductor worth, Lc, and parasitic components proven. The sum of all of those inductances is the entire secondary-loop inductance, or Ltsl. Ltsl determines TLVR efficiency, as each the added output present slew charge and high-frequency ripple present from the TLVR loop are inversely proportional to it. Due to the unpredictability of the parasitic inductances, when the TLVR was first launched, it included a hard and fast Lc within the secondary loop.
The present method units Lc to “swamp out” the parasitic inductances, assuming that they’re much lower than Lc. However there’s a scope measurement throughout Lc that both will confirm this assumption, or if not, present the data you have to estimate the Ltsl. You may then alter Lc to higher match the goal total leakage for greatest slew-rate functionality and ripple present efficiency, and in some circumstances omit it.
The TLVR efficiency equation is the output present slew-down functionality ΔI/Δt in amperes per microseconds (A/µs), with some current functions asking for as a lot as 5,000 A/µs. Slew-up functionality is simply as vital, however with VIN (12 V usually) usually a lot larger than VOUT (0.7 V to 1.8 V usually), the slew-up charge functionality will usually be a lot larger, and doubtlessly extreme. Limiting what number of phases you’ll be able to activate on the identical time will often scale back extreme slew-up functionality.
The equations in Desk 1 present that the load slew-rate acceleration is inversely proportional to Ltsl. Desk 2 exhibits that the high-frequency TLVR currents are additionally inversely proportional to Ltsl.
Buck slew down ΔI/Δt |
L is the worth of the discrete output inductor at every stage |
|
TLVR slew down ΔI/Δt |
Lm is the worth of the magnetizing inductance at every stage |
|
Ltsl |
(Assuming that Ltsl = Lc [1]) |
LLeakage is outlined because the leakage inductance of every output inductor |
Desk 1 Buck and TLVR slew-down ΔI/Δt equations. Supply: Texas Devices
Time interval the place all phases are off (TOFF) |
Fsw is the switching frequency of every section |
|
Excessive frequency p-p present ripple (ΔILtsl) |
Within the secondary loop and in every energy stage |
|
Root-mean-square (RMS) worth of this present |
|
Desk 2 TLVR high-frequency currents within the secondary winding and all phases when VOUT ´ Nphases < VIN. Supply: Texas Devices
Beneath in Desk 3 are the anticipated voltages throughout Lc when VOUT x Nphases < VIN assuming Ltsl ≈ Lc, and recalculation of Ltsl when smaller voltages are seen.
Voltage throughout Ltsl (and Lc if Ltsl ≈ Lc) when one section is on |
Assuming the polarity of Lc as proven in Determine 1 |
|
Voltage throughout Ltsl (and Lc if Ltsl ≈ Lc) when all phases are off |
Assuming polarity of Lc as proven in Determine 1 |
|
RMS of the waveform |
|
|
Estimating Ltsl when the precise waveform is smaller than the anticipated waveform |
Use calculated VLtslrms and measured VLcrms |
Desk 3 Anticipated voltage waveform throughout Lc when VOUT x Nphases < VIN assuming Ltsl ≈ Lc, and recalculation of Ltsl when smaller voltages are seen. Supply: Texas Devices
Now it’s time to introduce a design instance, beginning with the necessities and total method, as proven in Desk 4.
VIN |
12 V |
TLVR loops |
2 loops interleaved |
VOUT |
1.0 V |
Every loop |
>2,500 A/µs |
Maximum IOUT |
1,000 A |
Levels Nwhole |
16 |
Energy levels |
32 |
Phases Nphases |
8 |
Phases |
16 |
Lm |
120 nH |
Levels/section |
2 |
Goal Ltsl |
100 nH |
Fsw every section |
570 kHz |
Ripple frequency |
4.56 MHz |
Most load step |
500 A |
Ripple p-p/RMS |
11.7 A/3.4 A |
Load slew charge |
5,000 A/µs |
VLtsl on/off |
–8 V/+16 V |
|
|
VLtslrms |
11.3 VRMS |
Desk 4 Design necessities and total method. Supply: Texas Devices
This 32-stage design makes use of two TLVR loops every on the near-5-MHz sawtooth frequency, however 180 levels out of section with a view to obtain good however imperfect cancellation of the sawtooth waveforms within the output capacitors. With out TLVR, even with 32 phases and inductors at solely 70 nH, the quickest slew-down charge can be 460 A/µs. Based mostly on the equations in Desk 2, the slew-down functionality can be -5,387 A/µs. Getting this >5,000 A/µs slew-rate functionality requires accepting a high-frequency ripple present in every section of three.4 ARMS.
I examined a board constructed up with the belief that Ltsl ≈ Lc and used 100 nH the goal Ltsl for Lc. Determine 2 exhibits the format of one of many two TLVR loops.
Determine 2 The format of a 16-power-stage TLVR loop. Supply: Texas Devices
However is the 100-nH Lc actually the true Ltsl of this 16-stage loop? See the massive secondary loop between “begin” and “finish” in Determine 2. Measuring the precise voltage waveform throughout Lc (L36 right here) when all 16 levels and eight phases are energetic sheds mild on this assumption. If Ltsl ≈ Lc and utilizing the formulation from Desk 3, it is best to count on a sq. wave going between +8 V and -16 V at eight instances the per-phase switching frequency. The RMS worth of this waveform needs to be 11.3 V.
Determine 3 exhibits what I really measured.
Determine 3 Measured voltage waveform throughout an eight-phase/16-stage compensating inductor with anticipated TLVR waveform if Ltsl ≈ Lc, proven in black. Supply: Texas Devices
Each the precise L36 waveform (pink) versus the anticipated whole leakage waveform (black) and the RMS worth (5.02 V versus 11.3 V) level to Lc being one-half the Ltsl and level to that truth that there’s one other 100 nanohenries from inductor leakages and PCB traces within the secondary loop. Evaluating the precise versus anticipated RMS values as a substitute of peak values will scale back the confusion launched by the parasitic ringing evident on the measured waveform.
With the entire inductance within the secondary loop at 200 nH, the output present slew-down functionality is diminished to -2,827 A/µs for the 32-stage design. For the 5,000 A/µs load slew-rate utility, shorting out the precise Lc diminished the entire secondary inductance again to 100 nH. For functions with a most load slew charge lower than 3,000 A/µs, leaving the compensating inductors in place will scale back circulating high-frequency currents by half and scale back losses from these currents by 75%.
Acquiring leakage inductance
Understanding the precise leakage inductance in your TLVR loop will put you in the perfect place to get your output present slew charge whereas minimizing added losses brought on by the TLVR loop. Discovering that one easy measurement offers you the required info is one instance of what my colleagues and I pursue at Texas Devices within the pursuits of power-management optimization.
Josh Mandelcorn has been at Texas Instrument’s Energy Design Companies group for nearly twenty years centered on designing energy options for automotive and communications / enterprise functions. He has designed high-current multiphase converters to energy core and reminiscence rails of processors dealing with giant speedy load adjustments with stringent voltage underneath / overshoot necessities. He beforehand designed off-line AC to DC converters within the 250 W to 2 kW vary with a deal with emissions compliance. He’s listed as both an creator or co-author on 17 US patents associated to energy conversion. He acquired a BSEE diploma from the Carnegie-Mellon College, Pittsburgh, Pennsylvania.
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References
- Schurmann, Matthew, and Mohamed Ahmed. “Introduction to the Trans-inductor Voltage Regulator (TLVR).” Texas Devices Energy Provide Design Seminar SEM2600, literature No. SLUP413. 2024-2025.
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