Capturing transient analog alerts with a microcontroller usually includes including a full-fat peak-hold circuit as an exterior peripheral. This novel strategy minimizes that additional {hardware} by utilizing a µP’s capacity to modify its pins between analog and digital modes on the fly. Whereas this DI particularly makes use of a PIC, the precept may be utilized to any system with that functionality.
Wow the engineering world along with your distinctive design: Design Concepts Submission Information
Determine 1 reveals the fundamentals. We could need to add some issues later.
Determine 1 The essential peak-hold circuit. The PIC pin labelled ANA samples the voltage on C1 after which resets it to floor, prepared for the subsequent pattern.
A1 and D1 type an “energetic diode”, which quickly fees C1 to the height enter voltage by R1 every time A1’s non-inverting enter is larger than the diode’s output voltage and therefore that on the inverting enter. C1 holds its cost because it has no discharge path—leakages excepted—till the PIC must pattern it, when the ADC is assigned to the related enter pin (marked as ANA) which begins the acquisition interval, throughout which C1’s cost is shared with the PIC’s inside CHOLD. As soon as that is performed, the conversion may be began, which additionally instantly disconnects that pin from the ADC, permitting it to be modified from analog enter to digital output (energetic low) to discharge C1, resetting the circuit prepared for the subsequent cycle. Thus, a single processor pin performs two features. Determine 2 reveals typical code for the necessities.
Determine 2 Simplified code for capturing the voltage held on C1 after which instantly discharging it to reset the circuit prepared for the subsequent sampling cycle.
Now that we’ve acquired it working, it’s time to level out its shortcomings and recommend some workarounds.
The voltage throughout C1 can by no means be larger than a diode-drop beneath A1’s VDD, which limits the efficient measurement vary. (Though a Schottky diode with its decrease ahead voltage might be used for D1, the upper reverse leakage will compromise accuracy.) If the enter should cowl the total span, it’s best to pot it down first, and both settle for a barely restricted decision on measurements or use a decrease reference voltage (2.55 V may be supreme) for the DAC. A1’s VDD may be boosted—see afterward—to permit a full optimistic swing. Equally, its VSS might be pushed detrimental if readings wanted to be taken very near floor. Once more: see later.
Any enter offset in A1 will have an effect on precision. 1 LSB is about 13 mV when utilizing 8 bits with a 3.3 V reference, or ~800 µV with 12 bits, so the allowable offset is half that. (The MCP6021’s offset is quoted as being 500 µV at most.)
Observe that whereas C1’s voltage can be measured with respect to the PIC’s AVSS—or maybe its VREF- pin—it will likely be discharged to DVSS. (The decrease pin-count units mix AVSS and DVSS on a single floor pin.) Be cautious of any relative offset between them if accuracy is paramount at low enter ranges. Microcontrollers are sometimes put to sleep throughout analog measurements to reduce such errors, which might range in line with how laborious the system is working.
A extra refined supply of errors is inherent within the ADC’s operation. Internally, it makes use of a small capacitor (CHOLD), wherever from 10 pF to 120 pF relying on the system’s classic, to carry the enter for processing. The cost on the exterior capacitor C1 is shared with the interior one in the course of the acquisition time, so until the ADC is definitely linked to the pin when the enter pulse arrives, it is going to learn low, scaled by C1 / (C1 + CHOLD). With C1 = 10 nF and if the DAC’s CHOLD = 10 pF, as within the extra trendy PICs, the error can be ~1 LSB for a 10-bit end result, however negligible for 8 bits; decrease values of C1 will result in higher errors.
If that enter pulse is shorter than the reset interval and arrives whereas the pin is being held low, it will likely be attenuated and successfully misplaced. (And make it possible for A1’s decoupling cap can supply the inevitable energy transient.) Including an additional MOSFET (additional GPIO pin required, as proven in Determine 2, beneath) permits ‘immediate’ resetting (or round a thousand instances quicker, most likely inside a single instruction cycle), and to a real floor fairly than the PIC’s inside one. (The ADC’s pin would then be left in analog mode.) A treatment in ultra-critical conditions may be to duplicate the maintain circuitry on one other pin and pattern every channel alternately, choosing the upper studying in code.
In my authentic software, which was measuring the power of RF sign bursts, none of those factors was an issue, because the enter was all the time between 0.2 and a couple of.5 V and lasted for tons of of microseconds, whereas the output was scaled to learn from 0 to 9.
Regardless of these reservations, this open-loop strategy may be quicker than the usual configuration which wraps an op-amp around the capacitor. As a result of C1 is pushed immediately, the rise-time of the enter pulse can now be as quick as you want. A1’s output could overshoot momentarily, however the glitch can be absorbed by the longer time-constant of R1C1.
For accuracy, R1 must be chosen in order that the op-amp’s output drive by no means exceeds its current-limit worth, as that may break the suggestions loop, leading to overshoot and a falsely excessive studying. Additionally, for clear operation, time-constant R1C1 must be at least A1’s rail-to-rail slewing time. The 10n + 47R (470 ns is about the identical because the measured slew) allowed for correct measurements of two.5 V pulses as quick as ~3 µs. Experiments confirmed that R1 might be decreased to 27R, giving a -10% error for 1 µs / 2.5 V enter pulses.
C1’s discharge time to half an LSB can be ~1.6 × (NumberOfBits + 1) × C1 × ROUT(LOW), the place the latter time period will usually be ~100 Ω for PICs working at 3.3 V. (That “~1.6” is after all 1 / (1 – 1 / e).) For 8 bits, 10 nF, and 100 Ω; that’s about 14 µs, which may be decreased for those who don’t must measure proper all the way down to floor. (Some PICs can wrestle there, anyway, particularly in the event that they use an inside op-amp within the ADC’s enter path.) Selecting to cancel the reset and re-enable the analog enter as quickly because the A–D conversion completed, which took ~20 µs in my implementation, was greater than ample and simplified the code.
A1 is proven as a Microchip MCP6021 (CMOS, RRIO, 2.5–5.5 V, 10 MHz GBW, <500 µV offset). The MCP6001 is cheaper however much less well-specified. As an apart, the twin MCP6022 is nice for five V experimenting and prototyping as a result of it’s accessible in DIP-8.
As drawn in Determine 1, A1 may be fed from a GPIO pin, permitting it to be powered down when the PIC is asleep. This clearly limits its VDD to the PIC’s provide voltage, limiting the enter vary as famous above. When you want the total vary and a better switched rail is offered, use that; if not, a easy voltage-doubler, most likely fed from a PWM output, gives a repair.
The MCP6021’s output drives low to inside ~5 mV of its VSS (<1/2 LSB with 8 bits). To function proper all the way down to floor, one other voltage-doubler can present a boosted detrimental feed, with a easy regulator lowering this to -0.6 V for low-voltage op-amps. Make it possible for the full voltage throughout A1 is inside its limits; an additional diode within the optimistic doubler—D6 in Determine 3—could also be wanted to ensure this. All these add-ons are lumped collectively in Determine 3. PICs’ pin-protection diodes are rated at 25 mA and must be protected with the elevated voltages below any fault situations. Whereas these easy PIC-driven voltage-doublers are solely good for just a few milliamps, they might assist energy different units if want be.
All this raises a reality-checking query: what’s powering the upstream circuitry, and is it actually delivering a rail-to-rail sign? If not, we don’t must fuss.
Determine 3 Boosting the op-amp’s provide rails can provide true rail-to-rail operation whereas an additional MOSFET permits “instantaneous” resetting of C1.
One other actuality examine: if each boosted rails can be found, why not use a higher-voltage, non-RRIO op-amp? The detrimental regulator Q2/3, and many others. then turns into pointless. The additional issues proven in Determine 2 most likely gained’t be wanted right here anyway however could turn out to be useful elsewhere.
Largely due to a PIC’s limitations, the easy circuit of Determine 1 is correct fairly than completely exact, however has nonetheless proved dependable and helpful, particularly the place board area was at a premium. It may be applicable as a entrance finish for an exterior peak-sensing A–D peripheral. The underlying precept may be utilized in microprocessor-based equipment to clamp a sign line to floor, albeit with 100 Ω or so successfully in collection, maybe the place a MOSFET would add an excessive amount of capacitance.
—Nick Cornford constructed his first crystal set at 10, and since then has designed skilled audio gear, many datacomm merchandise, and technical safety equipment. He has eventually retired. Principally. Form of.
Associated Content material
- Precision peak detector makes use of no precision parts
- Mentioning PIC: The agony
- A circuit to make use of PIC peripheral outputs concurrently
- PIC microprocessor drives 20-LED dot- or bar-graph show
- Extremely-low distortion oscillator, half 1: how to not do it.
googletag.cmd.push(perform() { googletag.show(‘div-gpt-ad-native’); });
–>
The submit Maintain that peak with a PIC appeared first on EDN.
